1. Field of the Invention
The present invention relates generally to digital to analog converters, and more specifically to a sigma delta digital to analog converter (SD-DAC) with wide output range and improved linearity.
2. Related Art
Digital to analog converters (DAC) are often implemented employing sigma delta (also known as delta sigma) modulation techniques. As is well known in the relevant arts, a sigma delta DAC is a type of DAC containing a sigma delta modulator followed by a digital-to-analog conversion stage and an analog filter, with the sigma delta modulator receiving the digital input (or at least a portion of the digital input) sought to be converted, and the analog filter providing the corresponding analog level.
As is also well known in the relevant arts, a first order sigma delta modulator may contain one summing junction, an integrator and a quantizer. The output of the quantizer (which is also the output of the sigma delta modulator) is subtracted from the input, and the resulting difference (delta value) is integrated. The integrated value (sigma value) is then quantized (converted to a nearest one of multiple predetermined discrete levels) by the quantizer. Higher order sigma delta modulators may contain further summing junctions and quantizers, as is also well known in relevant arts. Different architectures of sigma delta modulators are used to achieve different goals such as lower power, ease of implementation, etc.
Output range of a sigma delta DAC refers to the range of analog levels (e.g., −5 volts to +5 volts) that can be provided by the sigma delta DAC. Linearity, generally, is a measure of the extent of straight-line relation between the inputs and the corresponding outputs.
Several aspects of the present invention provide a sigma delta DAC with wide output range and/or improved linearity.